This disclosure relates generally to the field of semiconductor device testing, and more particularly to a vertical probe assembly for semiconductor device testing.
Semiconductor devices, also referred to as integrated circuit (IC) chips, are electrically interconnected for such purposes as testing, burn-in, and utilization. Interconnection methods include rigid probes and contacts, flexible probes and contacts, wire bonding, soldering, and welding. The topology of the interconnections on a chip may vary from a line or linear array of peripherally spaced pads, bumps, or contacts, to an area array of two dimensionally spaced pads or bumps. The pads of bumps in either a linear or area array normally have a uniform width and center-to-center spacing in the array. The array of contacts in an area array are usually arranged in a pattern such as rows and columns orthogonal to one another. The trend in IC chips is for denser arrays of contacts and for more contacts per chip.
IC chips are typically tested at the wafer level, before the wafer is diced into individual IC chips. At the wafer level more than one chip may be tested at one time. In some cases individual chips are tested and burned in. In order to make temporary contact with high-density arrays of contacts on many IC chips sequentially at relatively high speeds for testing or burn-in of the IC chips, a probe assembly may be used. One type of probe assembly used for this purpose is a vertical probe assembly. An example of a vertical probe assembly is described in U.S. Pat. No. 4,027,935, which was granted on Jun. 7, 1977 to Byrnes et al., and which is herein incorporated by reference in its entirety. A vertical probe assembly has a plurality of conductive probe wires (referred to hereinafter as probes) mounted in parallel, with the ends of the probes ending in a plane transverse to the axis of the wires. The probe ends are shaped to facilitate making electrical contact to the contacts of an IC. Each probe is sufficiently rigid to apply pressure to a corresponding contact on the IC to form good electrical contact, yet flexible or springy enough to prevent excessive pressure on or deformation of the contact. When the probes in the probe assembly are aligned correctly, the ends are floating and the cumulative pressure exerted by the probes is sufficient with respect to the area of the contacts to form electrical connections with all of the contacts on the IC. Insufficient pressure may result in a lack of electrical contact with some contacts on the IC, while excess pressure from the vertical probe assembly on the contacts may damage the IC.
During testing or burn-in of an IC using a vertical probe assembly, the probes in the vertical probe assembly and contacts on the IC may experience relatively high currents caused by high test or burn in voltages. The high currents can cause overheating and may damage the vertical probe assembly or the IC. Faulty contacts discovered during burn-in or testing may be incorrectly attributed to a failure in the IC itself, instead of to an error with the vertical probe assembly, and an IC that contains a faulty contact may be discarded without further testing. This may lead to reduced yield for a semiconductor manufacturing process.